Multilevel Simulation of Heterogeneous Reconfigurable Platforms
This paper presents a general system-level simulation and testing methodology for reconfigurable System-on-Chips, starting from behavioral specifications of system activities to multilevel simulations of accelerated tasks running on the reconfigurable circuit. The system is based on a common object...
Saved in:
| Main Authors: | , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Wiley
2009-01-01
|
| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2009/162416 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1832549222709198848 |
|---|---|
| author | Damien Picard Loic Lagadec |
| author_facet | Damien Picard Loic Lagadec |
| author_sort | Damien Picard |
| collection | DOAJ |
| description | This paper presents a general system-level simulation and testing methodology for reconfigurable
System-on-Chips, starting from behavioral specifications of system activities to multilevel simulations of accelerated tasks running on the reconfigurable circuit. The system is based on a common objectoriented environment that offers valuable debugging and probing facilities as well as integrated testing features. Our system brings these benefits to the hardware simulation, while enforcing validation through characterization tests and interoperability through on-demand mainstream tools connections. This framework has been partially developed in the scope of the EU Morpheus project and is used to validate our contribution to the spatial design task. |
| format | Article |
| id | doaj-art-306033db70874990878a3a700a6b9df1 |
| institution | Kabale University |
| issn | 1687-7195 1687-7209 |
| language | English |
| publishDate | 2009-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | International Journal of Reconfigurable Computing |
| spelling | doaj-art-306033db70874990878a3a700a6b9df12025-02-03T06:11:43ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092009-01-01200910.1155/2009/162416162416Multilevel Simulation of Heterogeneous Reconfigurable PlatformsDamien Picard0Loic Lagadec1Université Européenne de Bretagne, 35000 Rennes, FranceUniversité Européenne de Bretagne, 35000 Rennes, FranceThis paper presents a general system-level simulation and testing methodology for reconfigurable System-on-Chips, starting from behavioral specifications of system activities to multilevel simulations of accelerated tasks running on the reconfigurable circuit. The system is based on a common objectoriented environment that offers valuable debugging and probing facilities as well as integrated testing features. Our system brings these benefits to the hardware simulation, while enforcing validation through characterization tests and interoperability through on-demand mainstream tools connections. This framework has been partially developed in the scope of the EU Morpheus project and is used to validate our contribution to the spatial design task.http://dx.doi.org/10.1155/2009/162416 |
| spellingShingle | Damien Picard Loic Lagadec Multilevel Simulation of Heterogeneous Reconfigurable Platforms International Journal of Reconfigurable Computing |
| title | Multilevel Simulation of Heterogeneous Reconfigurable Platforms |
| title_full | Multilevel Simulation of Heterogeneous Reconfigurable Platforms |
| title_fullStr | Multilevel Simulation of Heterogeneous Reconfigurable Platforms |
| title_full_unstemmed | Multilevel Simulation of Heterogeneous Reconfigurable Platforms |
| title_short | Multilevel Simulation of Heterogeneous Reconfigurable Platforms |
| title_sort | multilevel simulation of heterogeneous reconfigurable platforms |
| url | http://dx.doi.org/10.1155/2009/162416 |
| work_keys_str_mv | AT damienpicard multilevelsimulationofheterogeneousreconfigurableplatforms AT loiclagadec multilevelsimulationofheterogeneousreconfigurableplatforms |