Methods for Change Parallelism in Process of High-level VLSI Synthesis
In this paper methods for increasing the efficiency of VLSI development based on the method of architecture-independent design are proposed. The route of high-level VLSI synthesis is considered. The principle of constructing a VLSI hardware model based on the functional-flow programming paradigm is...
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| Format: | Article |
| Language: | English |
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Yaroslavl State University
2022-03-01
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| Series: | Моделирование и анализ информационных систем |
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| Online Access: | https://www.mais-journal.ru/jour/article/view/1608 |
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| author | Igor Nikolaevich Ryzhenko Oleg Vladimirovich Nepomnyaschy Aleksandr Ivanovich Legalov Vladimir Viktorovich Shaidurov |
| author_facet | Igor Nikolaevich Ryzhenko Oleg Vladimirovich Nepomnyaschy Aleksandr Ivanovich Legalov Vladimir Viktorovich Shaidurov |
| author_sort | Igor Nikolaevich Ryzhenko |
| collection | DOAJ |
| description | In this paper methods for increasing the efficiency of VLSI development based on the method of architecture-independent design are proposed. The route of high-level VLSI synthesis is considered. The principle of constructing a VLSI hardware model based on the functional-flow programming paradigm is stated.The results of the development of methods and algorithms for transformation functional-parallel programs into programs in HDL languages that support the design process of digital chips are presented. The principles of assessment are considered and the classes of resources required for the analysis of design solutions are identified. Reduction coefficients and methods of their calculation for each resource class have been introduced. An algorithm for calculating the reduction coefficients and estimating the required resources is proposed. An algorithm for converting parallelism is proposed, taking into account the specified constraints of the target platform. A mechanism for the exchange of metrics with an architecture-dependent level has been developed. Examples of parallelism reduction for the FPGA platform and practical implementation of FFT algorithms in the Virtex® UltraScale FPGA basis are given. The developed methods and algorithms make it possible to use the method of architecture-independent synthesis for transferring VLSI projects to various architectures by changing the parallelism of the circuit and equivalent transformations of parallel programs. The proposed approach provides many options for hardware solutions for implementation on various target platforms. |
| format | Article |
| id | doaj-art-2dd2786a54844fa2b7e69a57b11192f2 |
| institution | DOAJ |
| issn | 1818-1015 2313-5417 |
| language | English |
| publishDate | 2022-03-01 |
| publisher | Yaroslavl State University |
| record_format | Article |
| series | Моделирование и анализ информационных систем |
| spelling | doaj-art-2dd2786a54844fa2b7e69a57b11192f22025-08-20T03:00:45ZengYaroslavl State UniversityМоделирование и анализ информационных систем1818-10152313-54172022-03-01291607210.18255/1818-1015-2022-1-60-721235Methods for Change Parallelism in Process of High-level VLSI SynthesisIgor Nikolaevich Ryzhenko0Oleg Vladimirovich Nepomnyaschy1Aleksandr Ivanovich Legalov2Vladimir Viktorovich Shaidurov3Siberian Federal UniversitySiberian Federal UniversityHigher School of EconomicsKrasnoyarsk Science Centre of the Siberian Branch of Russian Academy of ScienceIn this paper methods for increasing the efficiency of VLSI development based on the method of architecture-independent design are proposed. The route of high-level VLSI synthesis is considered. The principle of constructing a VLSI hardware model based on the functional-flow programming paradigm is stated.The results of the development of methods and algorithms for transformation functional-parallel programs into programs in HDL languages that support the design process of digital chips are presented. The principles of assessment are considered and the classes of resources required for the analysis of design solutions are identified. Reduction coefficients and methods of their calculation for each resource class have been introduced. An algorithm for calculating the reduction coefficients and estimating the required resources is proposed. An algorithm for converting parallelism is proposed, taking into account the specified constraints of the target platform. A mechanism for the exchange of metrics with an architecture-dependent level has been developed. Examples of parallelism reduction for the FPGA platform and practical implementation of FFT algorithms in the Virtex® UltraScale FPGA basis are given. The developed methods and algorithms make it possible to use the method of architecture-independent synthesis for transferring VLSI projects to various architectures by changing the parallelism of the circuit and equivalent transformations of parallel programs. The proposed approach provides many options for hardware solutions for implementation on various target platforms.https://www.mais-journal.ru/jour/article/view/1608parallel computingdataflowfunctional programminghigh-level synthesisvlsi |
| spellingShingle | Igor Nikolaevich Ryzhenko Oleg Vladimirovich Nepomnyaschy Aleksandr Ivanovich Legalov Vladimir Viktorovich Shaidurov Methods for Change Parallelism in Process of High-level VLSI Synthesis Моделирование и анализ информационных систем parallel computing dataflow functional programming high-level synthesis vlsi |
| title | Methods for Change Parallelism in Process of High-level VLSI Synthesis |
| title_full | Methods for Change Parallelism in Process of High-level VLSI Synthesis |
| title_fullStr | Methods for Change Parallelism in Process of High-level VLSI Synthesis |
| title_full_unstemmed | Methods for Change Parallelism in Process of High-level VLSI Synthesis |
| title_short | Methods for Change Parallelism in Process of High-level VLSI Synthesis |
| title_sort | methods for change parallelism in process of high level vlsi synthesis |
| topic | parallel computing dataflow functional programming high-level synthesis vlsi |
| url | https://www.mais-journal.ru/jour/article/view/1608 |
| work_keys_str_mv | AT igornikolaevichryzhenko methodsforchangeparallelisminprocessofhighlevelvlsisynthesis AT olegvladimirovichnepomnyaschy methodsforchangeparallelisminprocessofhighlevelvlsisynthesis AT aleksandrivanovichlegalov methodsforchangeparallelisminprocessofhighlevelvlsisynthesis AT vladimirviktorovichshaidurov methodsforchangeparallelisminprocessofhighlevelvlsisynthesis |