Sorting algorithm acceleration based on CPU-FPGA heterogeneous system
Traditional sorting methods are mainly implemented in software serial mode, including bubble sorting, selective sorting and so on. These algorithms often use sequential comparison, and the operation time complexity is relatively high. In recent years, some sorting algorithms with a high degree of pa...
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| Format: | Article |
| Language: | zho |
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National Computer System Engineering Research Institute of China
2022-01-01
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| Series: | Dianzi Jishu Yingyong |
| Subjects: | |
| Online Access: | http://www.chinaaet.com/article/3000145071 |
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| _version_ | 1849425665148846080 |
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| author | Kou Yuanbo Qiu Zeyu Wang Liang Huang Jianqiang |
| author_facet | Kou Yuanbo Qiu Zeyu Wang Liang Huang Jianqiang |
| author_sort | Kou Yuanbo |
| collection | DOAJ |
| description | Traditional sorting methods are mainly implemented in software serial mode, including bubble sorting, selective sorting and so on. These algorithms often use sequential comparison, and the operation time complexity is relatively high. In recent years, some sorting algorithms with a high degree of parallelism have been proposed, but due to the hardware characteristics of the CPU, the parallelism of these algorithms cannot be used well. And FPGA has the characteristics of good flexibility, parallelism and integration, so the advantages of these parallel algorithms can be better utilized on FPGA, thereby greatly improving the real-time performance of data sorting. Based on this, the paper designs a CPU-FPGA heterogeneous system, transplants some sorting algorithms to FPGA, and performs functional verification and theoretical performance evaluation. The results show that the system has a good acceleration effect for sorting algorithms with high parallelism, but consumes huge logic resources, and is suitable for algorithm acceleration scenarios with high real-time requirements. |
| format | Article |
| id | doaj-art-2d7fdb26e9fe4b57a748657e95e10398 |
| institution | Kabale University |
| issn | 0258-7998 |
| language | zho |
| publishDate | 2022-01-01 |
| publisher | National Computer System Engineering Research Institute of China |
| record_format | Article |
| series | Dianzi Jishu Yingyong |
| spelling | doaj-art-2d7fdb26e9fe4b57a748657e95e103982025-08-20T03:29:43ZzhoNational Computer System Engineering Research Institute of ChinaDianzi Jishu Yingyong0258-79982022-01-01481182310.16157/j.issn.0258-7998.2124313000145071Sorting algorithm acceleration based on CPU-FPGA heterogeneous systemKou Yuanbo0Qiu Zeyu1Wang Liang2Huang Jianqiang3Department of Computer Technology and Applications，Qinghai University，Xining 810016，ChinaDepartment of Computer Technology and Applications，Qinghai University，Xining 810016，ChinaDepartment of Computer Technology and Applications，Qinghai University，Xining 810016，ChinaDepartment of Computer Technology and Applications，Qinghai University，Xining 810016，ChinaTraditional sorting methods are mainly implemented in software serial mode, including bubble sorting, selective sorting and so on. These algorithms often use sequential comparison, and the operation time complexity is relatively high. In recent years, some sorting algorithms with a high degree of parallelism have been proposed, but due to the hardware characteristics of the CPU, the parallelism of these algorithms cannot be used well. And FPGA has the characteristics of good flexibility, parallelism and integration, so the advantages of these parallel algorithms can be better utilized on FPGA, thereby greatly improving the real-time performance of data sorting. Based on this, the paper designs a CPU-FPGA heterogeneous system, transplants some sorting algorithms to FPGA, and performs functional verification and theoretical performance evaluation. The results show that the system has a good acceleration effect for sorting algorithms with high parallelism, but consumes huge logic resources, and is suitable for algorithm acceleration scenarios with high real-time requirements.http://www.chinaaet.com/article/3000145071fpgasorting algorithmheterogeneous systemalgorithm acceleration |
| spellingShingle | Kou Yuanbo Qiu Zeyu Wang Liang Huang Jianqiang Sorting algorithm acceleration based on CPU-FPGA heterogeneous system Dianzi Jishu Yingyong fpga sorting algorithm heterogeneous system algorithm acceleration |
| title | Sorting algorithm acceleration based on CPU-FPGA heterogeneous system |
| title_full | Sorting algorithm acceleration based on CPU-FPGA heterogeneous system |
| title_fullStr | Sorting algorithm acceleration based on CPU-FPGA heterogeneous system |
| title_full_unstemmed | Sorting algorithm acceleration based on CPU-FPGA heterogeneous system |
| title_short | Sorting algorithm acceleration based on CPU-FPGA heterogeneous system |
| title_sort | sorting algorithm acceleration based on cpu fpga heterogeneous system |
| topic | fpga sorting algorithm heterogeneous system algorithm acceleration |
| url | http://www.chinaaet.com/article/3000145071 |
| work_keys_str_mv | AT kouyuanbo sortingalgorithmaccelerationbasedoncpufpgaheterogeneoussystem AT qiuzeyu sortingalgorithmaccelerationbasedoncpufpgaheterogeneoussystem AT wangliang sortingalgorithmaccelerationbasedoncpufpgaheterogeneoussystem AT huangjianqiang sortingalgorithmaccelerationbasedoncpufpgaheterogeneoussystem |