Correction: A Valuable and Low-Budget Process Scheme of Equivalized 1 nm Technology Node Based on 2D Materials
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| Main Authors: | , , , , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
SpringerOpen
2025-06-01
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| Series: | Nano-Micro Letters |
| Online Access: | https://doi.org/10.1007/s40820-025-01747-8 |
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| _version_ | 1849342366779965440 |
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| author | Yang Shen Zhejia Zhang Zhujun Yao Mengge Jin Jintian Gao Yuhan Zhao Wenzhong Bao Yabin Sun He Tian |
| author_facet | Yang Shen Zhejia Zhang Zhujun Yao Mengge Jin Jintian Gao Yuhan Zhao Wenzhong Bao Yabin Sun He Tian |
| author_sort | Yang Shen |
| collection | DOAJ |
| format | Article |
| id | doaj-art-2c0315f0bf404b42a46a7e343dec0aec |
| institution | Kabale University |
| issn | 2311-6706 2150-5551 |
| language | English |
| publishDate | 2025-06-01 |
| publisher | SpringerOpen |
| record_format | Article |
| series | Nano-Micro Letters |
| spelling | doaj-art-2c0315f0bf404b42a46a7e343dec0aec2025-08-20T03:43:26ZengSpringerOpenNano-Micro Letters2311-67062150-55512025-06-011711410.1007/s40820-025-01747-8Correction: A Valuable and Low-Budget Process Scheme of Equivalized 1 nm Technology Node Based on 2D MaterialsYang Shen0Zhejia Zhang1Zhujun Yao2Mengge Jin3Jintian Gao4Yuhan Zhao5Wenzhong Bao6Yabin Sun7He Tian8College of Integrated Circuit Science and Engineering, Shanghai Key Laboratory of Multidimensional Information Processing, East China Normal UniversityState Key Laboratory of ASIC and System, School of Microelectronics, Fudan UniversityInstitute of Microelectronics and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua UniversityCollege of Integrated Circuit Science and Engineering, Shanghai Key Laboratory of Multidimensional Information Processing, East China Normal UniversityInstitute of Microelectronics and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua UniversityInstitute of Microelectronics and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua UniversityState Key Laboratory of ASIC and System, School of Microelectronics, Fudan UniversityCollege of Integrated Circuit Science and Engineering, Shanghai Key Laboratory of Multidimensional Information Processing, East China Normal UniversityInstitute of Microelectronics and Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua Universityhttps://doi.org/10.1007/s40820-025-01747-8 |
| spellingShingle | Yang Shen Zhejia Zhang Zhujun Yao Mengge Jin Jintian Gao Yuhan Zhao Wenzhong Bao Yabin Sun He Tian Correction: A Valuable and Low-Budget Process Scheme of Equivalized 1 nm Technology Node Based on 2D Materials Nano-Micro Letters |
| title | Correction: A Valuable and Low-Budget Process Scheme of Equivalized 1 nm Technology Node Based on 2D Materials |
| title_full | Correction: A Valuable and Low-Budget Process Scheme of Equivalized 1 nm Technology Node Based on 2D Materials |
| title_fullStr | Correction: A Valuable and Low-Budget Process Scheme of Equivalized 1 nm Technology Node Based on 2D Materials |
| title_full_unstemmed | Correction: A Valuable and Low-Budget Process Scheme of Equivalized 1 nm Technology Node Based on 2D Materials |
| title_short | Correction: A Valuable and Low-Budget Process Scheme of Equivalized 1 nm Technology Node Based on 2D Materials |
| title_sort | correction a valuable and low budget process scheme of equivalized 1 nm technology node based on 2d materials |
| url | https://doi.org/10.1007/s40820-025-01747-8 |
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