Tri‐Layer Heterostructure Channel of a‐IGZO/a‐ITZO/a‐IGZO Toward Enhancement of Transport and Reliability in Amorphous Oxide Semiconductor Thin Film Transistors

Abstract Thin film transistors (TFTs) based on amorphous oxide semiconductors (AOS) are promising candidates for panel displays. However, the trade‐off between mobility and reliability in AOS‐TFTs hinders their further applications in next‐generation display techniques and newly developed logic and...

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Main Authors: Ke Hu, Zean Guo, Jiawei Wang, Congyan Lu, Mingliang Wang, Tianyuan Wang, Fuxi Liao, Guanhua Yang, Nianduan Lu, Ling Li
Format: Article
Language:English
Published: Wiley-VCH 2025-02-01
Series:Advanced Electronic Materials
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Online Access:https://doi.org/10.1002/aelm.202400266
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author Ke Hu
Zean Guo
Jiawei Wang
Congyan Lu
Mingliang Wang
Tianyuan Wang
Fuxi Liao
Guanhua Yang
Nianduan Lu
Ling Li
author_facet Ke Hu
Zean Guo
Jiawei Wang
Congyan Lu
Mingliang Wang
Tianyuan Wang
Fuxi Liao
Guanhua Yang
Nianduan Lu
Ling Li
author_sort Ke Hu
collection DOAJ
description Abstract Thin film transistors (TFTs) based on amorphous oxide semiconductors (AOS) are promising candidates for panel displays. However, the trade‐off between mobility and reliability in AOS‐TFTs hinders their further applications in next‐generation display techniques and newly developed logic and memory circuits. Here, a structural strategy is proposed for the mobility‐reliability trade‐off, via a triple‐layer channel containing a Ga‐free high‐mobility layer (amorphous InSnZnO, a‐ITZO) sandwiched by two Ga‐rich layers (amorphous InGaZnO, a‐IGZO) with higher reliability. Gate‐induced carrier accumulation is verified mainly being energetically confined within the high mobility a‐ITZO layer, at the newly defined a‐ITZO/a‐IGZO interface. Compared to single layer a‐ITZO‐TFTs, triple‐channel a‐IGZO/a‐ITZO/a‐IGZO TFTs (GTG‐TFTs) exhibit outstanding stability and electrical transport performances, with suppressed positive/negative‐bias‐stress voltage shifts from 1/0.3 to 0.1/0.004 V, enhanced field effect mobility from ≈40 to 56 cm2V−1s−1, and optimized sub‐threshold swing down to 80 mV dec−1. Further numerical simulations and charge transport characterizations, including magnetotransport and gate‐induced Hall effect, indicate that charge transport in tri‐layer structure is less affected by energetic disorders present at gate insulator interfaces.
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spelling doaj-art-1d5c67a55bc54787afb0bdf31a16fb1f2025-08-20T03:12:20ZengWiley-VCHAdvanced Electronic Materials2199-160X2025-02-01112n/an/a10.1002/aelm.202400266Tri‐Layer Heterostructure Channel of a‐IGZO/a‐ITZO/a‐IGZO Toward Enhancement of Transport and Reliability in Amorphous Oxide Semiconductor Thin Film TransistorsKe Hu0Zean Guo1Jiawei Wang2Congyan Lu3Mingliang Wang4Tianyuan Wang5Fuxi Liao6Guanhua Yang7Nianduan Lu8Ling Li9State key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 ChinaState key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 ChinaState key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 ChinaState key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 ChinaState key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 ChinaState key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 ChinaState key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 ChinaState key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 ChinaState key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 ChinaState key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 ChinaAbstract Thin film transistors (TFTs) based on amorphous oxide semiconductors (AOS) are promising candidates for panel displays. However, the trade‐off between mobility and reliability in AOS‐TFTs hinders their further applications in next‐generation display techniques and newly developed logic and memory circuits. Here, a structural strategy is proposed for the mobility‐reliability trade‐off, via a triple‐layer channel containing a Ga‐free high‐mobility layer (amorphous InSnZnO, a‐ITZO) sandwiched by two Ga‐rich layers (amorphous InGaZnO, a‐IGZO) with higher reliability. Gate‐induced carrier accumulation is verified mainly being energetically confined within the high mobility a‐ITZO layer, at the newly defined a‐ITZO/a‐IGZO interface. Compared to single layer a‐ITZO‐TFTs, triple‐channel a‐IGZO/a‐ITZO/a‐IGZO TFTs (GTG‐TFTs) exhibit outstanding stability and electrical transport performances, with suppressed positive/negative‐bias‐stress voltage shifts from 1/0.3 to 0.1/0.004 V, enhanced field effect mobility from ≈40 to 56 cm2V−1s−1, and optimized sub‐threshold swing down to 80 mV dec−1. Further numerical simulations and charge transport characterizations, including magnetotransport and gate‐induced Hall effect, indicate that charge transport in tri‐layer structure is less affected by energetic disorders present at gate insulator interfaces.https://doi.org/10.1002/aelm.202400266Amorphous Oxide semiconductorcharge transportsheterostructuremobility and reliabilitythin film transistors
spellingShingle Ke Hu
Zean Guo
Jiawei Wang
Congyan Lu
Mingliang Wang
Tianyuan Wang
Fuxi Liao
Guanhua Yang
Nianduan Lu
Ling Li
Tri‐Layer Heterostructure Channel of a‐IGZO/a‐ITZO/a‐IGZO Toward Enhancement of Transport and Reliability in Amorphous Oxide Semiconductor Thin Film Transistors
Advanced Electronic Materials
Amorphous Oxide semiconductor
charge transports
heterostructure
mobility and reliability
thin film transistors
title Tri‐Layer Heterostructure Channel of a‐IGZO/a‐ITZO/a‐IGZO Toward Enhancement of Transport and Reliability in Amorphous Oxide Semiconductor Thin Film Transistors
title_full Tri‐Layer Heterostructure Channel of a‐IGZO/a‐ITZO/a‐IGZO Toward Enhancement of Transport and Reliability in Amorphous Oxide Semiconductor Thin Film Transistors
title_fullStr Tri‐Layer Heterostructure Channel of a‐IGZO/a‐ITZO/a‐IGZO Toward Enhancement of Transport and Reliability in Amorphous Oxide Semiconductor Thin Film Transistors
title_full_unstemmed Tri‐Layer Heterostructure Channel of a‐IGZO/a‐ITZO/a‐IGZO Toward Enhancement of Transport and Reliability in Amorphous Oxide Semiconductor Thin Film Transistors
title_short Tri‐Layer Heterostructure Channel of a‐IGZO/a‐ITZO/a‐IGZO Toward Enhancement of Transport and Reliability in Amorphous Oxide Semiconductor Thin Film Transistors
title_sort tri layer heterostructure channel of a igzo a itzo a igzo toward enhancement of transport and reliability in amorphous oxide semiconductor thin film transistors
topic Amorphous Oxide semiconductor
charge transports
heterostructure
mobility and reliability
thin film transistors
url https://doi.org/10.1002/aelm.202400266
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