A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation
Channel estimation in wireless communication systems is usually accomplished by inserting, along with the information, a series of known symbols, whose analysis is used to define the parameters of the filters that remove the distortion of the data. Nevertheless, a part of the available bandwidth...
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Format: | Article |
Language: | English |
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Wiley
2009-01-01
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Series: | International Journal of Reconfigurable Computing |
Online Access: | http://dx.doi.org/10.1155/2009/912301 |
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author | Fernando Martín del Campo René Cumplido Roberto Perez-Andrade A. G. Orozco-Lugo |
author_facet | Fernando Martín del Campo René Cumplido Roberto Perez-Andrade A. G. Orozco-Lugo |
author_sort | Fernando Martín del Campo |
collection | DOAJ |
description | Channel estimation in wireless communication systems is usually accomplished by inserting, along
with the information, a series of known symbols, whose analysis is
used to define the parameters of the filters that remove the
distortion of the data. Nevertheless, a part of the available
bandwidth has to be destined to these symbols. Until now, no
alternative solution has demonstrated to be fully satisfying for
commercial use, but one technique that looks promising is
superimposed training (ST). This work describes a hybrid
software-hardware FPGA implementation of a recent algorithm that
belongs to the ST family, known as Data-dependent Superimposed
Training (DDST), which does not need extra bandwidth for its
training sequences (TS) as it adds them arithmetically to the
data. DDST also adds a third sequence known as data-dependent
sequence, that destroys the interference caused by the data over
the TS. As DDST's computational burden is too high for the
commercial processors used in mobile systems, a System on a
Programmable Chip (SOPC) approach is used in order to solve the
problem. |
format | Article |
id | doaj-art-1b7c8a5479754df9aac31949f67d2f27 |
institution | Kabale University |
issn | 1687-7195 1687-7209 |
language | English |
publishDate | 2009-01-01 |
publisher | Wiley |
record_format | Article |
series | International Journal of Reconfigurable Computing |
spelling | doaj-art-1b7c8a5479754df9aac31949f67d2f272025-02-03T01:23:30ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092009-01-01200910.1155/2009/912301912301A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel EstimationFernando Martín del Campo0René Cumplido1Roberto Perez-Andrade2A. G. Orozco-Lugo3Computer Science Department, National Institute of Astrophysics, Optics and Electronics, CP 72840, Puebla, MexicoComputer Science Department, National Institute of Astrophysics, Optics and Electronics, CP 72840, Puebla, MexicoComputer Science Department, National Institute of Astrophysics, Optics and Electronics, CP 72840, Puebla, MexicoSection of Communications, CINVESTAV-IPN, CP 07360, Mexico City, MexicoChannel estimation in wireless communication systems is usually accomplished by inserting, along with the information, a series of known symbols, whose analysis is used to define the parameters of the filters that remove the distortion of the data. Nevertheless, a part of the available bandwidth has to be destined to these symbols. Until now, no alternative solution has demonstrated to be fully satisfying for commercial use, but one technique that looks promising is superimposed training (ST). This work describes a hybrid software-hardware FPGA implementation of a recent algorithm that belongs to the ST family, known as Data-dependent Superimposed Training (DDST), which does not need extra bandwidth for its training sequences (TS) as it adds them arithmetically to the data. DDST also adds a third sequence known as data-dependent sequence, that destroys the interference caused by the data over the TS. As DDST's computational burden is too high for the commercial processors used in mobile systems, a System on a Programmable Chip (SOPC) approach is used in order to solve the problem.http://dx.doi.org/10.1155/2009/912301 |
spellingShingle | Fernando Martín del Campo René Cumplido Roberto Perez-Andrade A. G. Orozco-Lugo A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation International Journal of Reconfigurable Computing |
title | A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation |
title_full | A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation |
title_fullStr | A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation |
title_full_unstemmed | A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation |
title_short | A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation |
title_sort | system on a programmable chip architecture for data dependent superimposed training channel estimation |
url | http://dx.doi.org/10.1155/2009/912301 |
work_keys_str_mv | AT fernandomartindelcampo asystemonaprogrammablechiparchitecturefordatadependentsuperimposedtrainingchannelestimation AT renecumplido asystemonaprogrammablechiparchitecturefordatadependentsuperimposedtrainingchannelestimation AT robertoperezandrade asystemonaprogrammablechiparchitecturefordatadependentsuperimposedtrainingchannelestimation AT agorozcolugo asystemonaprogrammablechiparchitecturefordatadependentsuperimposedtrainingchannelestimation AT fernandomartindelcampo systemonaprogrammablechiparchitecturefordatadependentsuperimposedtrainingchannelestimation AT renecumplido systemonaprogrammablechiparchitecturefordatadependentsuperimposedtrainingchannelestimation AT robertoperezandrade systemonaprogrammablechiparchitecturefordatadependentsuperimposedtrainingchannelestimation AT agorozcolugo systemonaprogrammablechiparchitecturefordatadependentsuperimposedtrainingchannelestimation |