APA (7th ed.) Citation

Coole, J., & Stitt, G. Traversal Caches: A Framework for FPGA Acceleration of Pointer Data Structures. Wiley.

Chicago Style (17th ed.) Citation

Coole, James, and Greg Stitt. Traversal Caches: A Framework for FPGA Acceleration of Pointer Data Structures. Wiley.

MLA (9th ed.) Citation

Coole, James, and Greg Stitt. Traversal Caches: A Framework for FPGA Acceleration of Pointer Data Structures. Wiley.

Warning: These citations may not always be 100% accurate.