Comparing Portability of FPGA High-Level Synthesis Frameworks in the Context of a Highly-Parallel Application
With the growing popularity of FPGA-based accelerators in HPC applications, new challenges have emerged, particularly in terms of programming and portability. This paper provides an overview of the current state of FPGA tools and their limitations. This study evaluates the performance and portabilit...
Saved in:
| Main Authors: | Manuel De Castro, Roberto R. Osorio, Francisco J. Andujar, Rocio Carratala-Saez, Yuri Torres, Diego R. Llanos |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
|
| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10926827/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
An efficient omnidirectional image unwrapping approach
by: Said Bouhend, et al.
Published: (2025-06-01) -
Zynq FPGA-Based Acceleration of Kernelized Correlation Filters via High-Level Synthesis of a Custom DFT Block
by: Enver Çavuş, et al.
Published: (2024-04-01) -
Framework for utilizing computational devices within simulation
by: Miroslav Mintál
Published: (2013-12-01) -
Autotuning Parallel Programs by Model Checking
by: Natalia Olegovna Garanina, et al.
Published: (2021-12-01) -
Viability Study of SYCL as a Unified Programming Model for Heterogeneous Systems Based on GPUs in Bioinformatics
by: Manuel Costanzo
Published: (2024-10-01)