Aging Analysis and Degradation Prediction of PLL Circuits in 14-nm FinFET Technology
This work investigates the reliability and aging predictions in a 14-nm FinFET-based analog circuit under high-temperature conditions. Aging simulations and accelerated aging tests were carried out on key devices of phase-locked loop (PLL) circuits, with a focus on the time-power-law exponent (n) of...
Saved in:
| Main Authors: | , , , , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
|
| Series: | IEEE Journal of the Electron Devices Society |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10918946/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1849388406746906624 |
|---|---|
| author | Meng Li Xin Xu Xianghui Li Yunpeng Li Yiqun Shi Qingqing Sun Hao Zhu |
| author_facet | Meng Li Xin Xu Xianghui Li Yunpeng Li Yiqun Shi Qingqing Sun Hao Zhu |
| author_sort | Meng Li |
| collection | DOAJ |
| description | This work investigates the reliability and aging predictions in a 14-nm FinFET-based analog circuit under high-temperature conditions. Aging simulations and accelerated aging tests were carried out on key devices of phase-locked loop (PLL) circuits, with a focus on the time-power-law exponent (n) of <inline-formula> <tex-math notation="LaTeX">$\Delta $ </tex-math></inline-formula> Vth and temperature activation energy. A coupling phenomenon between hot-carrier injection (HCI) and negative bias temperature instability (NBTI) effects has been found at elevated temperatures, where HCI-induced self-heating effect (SHE) exacerbated the NBTI effects. Device degradation was found to be closely related to the waveform, frequency, and operating temperature. The quasi-static-approximation (QSA) model built with DC stress test data, was employed for device and circuit degradation predictions, and its limitations and applicability were discussed. Additionally, based on AC test data, the QSA model was used to simulate corrections for device and circuit degradation at corresponding frequencies. The results revealed over-predictions of degradation level by a time factor over 10. |
| format | Article |
| id | doaj-art-118aebf1659a4b6785ff67fcc1e76f3d |
| institution | Kabale University |
| issn | 2168-6734 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal of the Electron Devices Society |
| spelling | doaj-art-118aebf1659a4b6785ff67fcc1e76f3d2025-08-20T03:42:19ZengIEEEIEEE Journal of the Electron Devices Society2168-67342025-01-011327027710.1109/JEDS.2025.354975410918946Aging Analysis and Degradation Prediction of PLL Circuits in 14-nm FinFET TechnologyMeng Li0Xin Xu1Xianghui Li2https://orcid.org/0000-0001-5054-4549Yunpeng Li3Yiqun Shi4Qingqing Sun5https://orcid.org/0000-0002-6533-1834Hao Zhu6https://orcid.org/0000-0003-3890-6871School of Microelectronics, Fudan University, Shanghai, ChinaSchool of Microelectronics, Fudan University, Shanghai, ChinaSchool of Microelectronics, Fudan University, Shanghai, ChinaSchool of Microelectronics, Fudan University, Shanghai, ChinaSchool of Microelectronics, Fudan University, Shanghai, ChinaSchool of Microelectronics, Fudan University, Shanghai, ChinaSchool of Microelectronics, Fudan University, Shanghai, ChinaThis work investigates the reliability and aging predictions in a 14-nm FinFET-based analog circuit under high-temperature conditions. Aging simulations and accelerated aging tests were carried out on key devices of phase-locked loop (PLL) circuits, with a focus on the time-power-law exponent (n) of <inline-formula> <tex-math notation="LaTeX">$\Delta $ </tex-math></inline-formula> Vth and temperature activation energy. A coupling phenomenon between hot-carrier injection (HCI) and negative bias temperature instability (NBTI) effects has been found at elevated temperatures, where HCI-induced self-heating effect (SHE) exacerbated the NBTI effects. Device degradation was found to be closely related to the waveform, frequency, and operating temperature. The quasi-static-approximation (QSA) model built with DC stress test data, was employed for device and circuit degradation predictions, and its limitations and applicability were discussed. Additionally, based on AC test data, the QSA model was used to simulate corrections for device and circuit degradation at corresponding frequencies. The results revealed over-predictions of degradation level by a time factor over 10.https://ieeexplore.ieee.org/document/10918946/Hot-carrier injection (HCI)negative bias temperature instability (NBTI)phase-locked loops (PLLs) circuitreliability |
| spellingShingle | Meng Li Xin Xu Xianghui Li Yunpeng Li Yiqun Shi Qingqing Sun Hao Zhu Aging Analysis and Degradation Prediction of PLL Circuits in 14-nm FinFET Technology IEEE Journal of the Electron Devices Society Hot-carrier injection (HCI) negative bias temperature instability (NBTI) phase-locked loops (PLLs) circuit reliability |
| title | Aging Analysis and Degradation Prediction of PLL Circuits in 14-nm FinFET Technology |
| title_full | Aging Analysis and Degradation Prediction of PLL Circuits in 14-nm FinFET Technology |
| title_fullStr | Aging Analysis and Degradation Prediction of PLL Circuits in 14-nm FinFET Technology |
| title_full_unstemmed | Aging Analysis and Degradation Prediction of PLL Circuits in 14-nm FinFET Technology |
| title_short | Aging Analysis and Degradation Prediction of PLL Circuits in 14-nm FinFET Technology |
| title_sort | aging analysis and degradation prediction of pll circuits in 14 nm finfet technology |
| topic | Hot-carrier injection (HCI) negative bias temperature instability (NBTI) phase-locked loops (PLLs) circuit reliability |
| url | https://ieeexplore.ieee.org/document/10918946/ |
| work_keys_str_mv | AT mengli aginganalysisanddegradationpredictionofpllcircuitsin14nmfinfettechnology AT xinxu aginganalysisanddegradationpredictionofpllcircuitsin14nmfinfettechnology AT xianghuili aginganalysisanddegradationpredictionofpllcircuitsin14nmfinfettechnology AT yunpengli aginganalysisanddegradationpredictionofpllcircuitsin14nmfinfettechnology AT yiqunshi aginganalysisanddegradationpredictionofpllcircuitsin14nmfinfettechnology AT qingqingsun aginganalysisanddegradationpredictionofpllcircuitsin14nmfinfettechnology AT haozhu aginganalysisanddegradationpredictionofpllcircuitsin14nmfinfettechnology |