An Interface for a Decentralized 2D Reconfiguration on Xilinx Virtex-FPGAs for Organic Computing
Partial and dynamic online reconfiguration of Field Programmable Gate Arrays (FPGAs) is a promising approach to design high adaptive systems with lower power consumption, higher task specific performance, and even build-in fault tolerance. Different techniques and tool flows have been successfully d...
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| Format: | Article |
| Language: | English |
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Wiley
2009-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2009/273791 |
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| _version_ | 1849308352143687680 |
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| author | Christian Schuck Bastian Haetzer Jü rgen Becker |
| author_facet | Christian Schuck Bastian Haetzer Jü rgen Becker |
| author_sort | Christian Schuck |
| collection | DOAJ |
| description | Partial and dynamic online reconfiguration of Field Programmable Gate Arrays (FPGAs) is a promising approach to design high adaptive systems with lower power consumption, higher task specific performance, and even build-in fault tolerance. Different techniques and tool flows have been successfully developed. One of them, the two-dimensional partial reconfiguration, based on the Readback-Modify-Writeback method implemented on Xilinx Virtex devices, makes them ideally suited to be used as a hardware platform in future organic computing systems, where a highly adaptive hardware is necessary. In turn, decentralisation, the key property of an organic computing system, is in contradiction with the central nature of the FPGAs configuration port. Therefore, this paper presents an approach that connects the single ICAP port to a network on chip (NoC) to provide access for all clients of the network. Through this a virtual decentralisation of the ICAP is achieved. Further true 2-dimensional partial reconfiguration is raised to a higher level of abstraction through a lightweight Readback-Modify-Writeback hardware module with different configuration and addressing modes. Results show that configuration data as well as reconfiguration times could be significantly reduced. |
| format | Article |
| id | doaj-art-0e7449dafc174b7895330c16069c0b33 |
| institution | Kabale University |
| issn | 1687-7195 1687-7209 |
| language | English |
| publishDate | 2009-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | International Journal of Reconfigurable Computing |
| spelling | doaj-art-0e7449dafc174b7895330c16069c0b332025-08-20T03:54:29ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092009-01-01200910.1155/2009/273791273791An Interface for a Decentralized 2D Reconfiguration on Xilinx Virtex-FPGAs for Organic ComputingChristian Schuck0Bastian Haetzer1Jü rgen Becker2Institut fü r Technik der Informationsverarbeitung (ITIV), Universität Karlsruhe (TH), Vincenz-Prießnitz-Straße 1, 76131 Karlsruhe, GermanyInstitut fü r Technik der Informationsverarbeitung (ITIV), Universität Karlsruhe (TH), Vincenz-Prießnitz-Straße 1, 76131 Karlsruhe, GermanyInstitut fü r Technik der Informationsverarbeitung (ITIV), Universität Karlsruhe (TH), Vincenz-Prießnitz-Straße 1, 76131 Karlsruhe, GermanyPartial and dynamic online reconfiguration of Field Programmable Gate Arrays (FPGAs) is a promising approach to design high adaptive systems with lower power consumption, higher task specific performance, and even build-in fault tolerance. Different techniques and tool flows have been successfully developed. One of them, the two-dimensional partial reconfiguration, based on the Readback-Modify-Writeback method implemented on Xilinx Virtex devices, makes them ideally suited to be used as a hardware platform in future organic computing systems, where a highly adaptive hardware is necessary. In turn, decentralisation, the key property of an organic computing system, is in contradiction with the central nature of the FPGAs configuration port. Therefore, this paper presents an approach that connects the single ICAP port to a network on chip (NoC) to provide access for all clients of the network. Through this a virtual decentralisation of the ICAP is achieved. Further true 2-dimensional partial reconfiguration is raised to a higher level of abstraction through a lightweight Readback-Modify-Writeback hardware module with different configuration and addressing modes. Results show that configuration data as well as reconfiguration times could be significantly reduced.http://dx.doi.org/10.1155/2009/273791 |
| spellingShingle | Christian Schuck Bastian Haetzer Jü rgen Becker An Interface for a Decentralized 2D Reconfiguration on Xilinx Virtex-FPGAs for Organic Computing International Journal of Reconfigurable Computing |
| title | An Interface for a Decentralized 2D Reconfiguration on Xilinx Virtex-FPGAs for Organic Computing |
| title_full | An Interface for a Decentralized 2D Reconfiguration on Xilinx Virtex-FPGAs for Organic Computing |
| title_fullStr | An Interface for a Decentralized 2D Reconfiguration on Xilinx Virtex-FPGAs for Organic Computing |
| title_full_unstemmed | An Interface for a Decentralized 2D Reconfiguration on Xilinx Virtex-FPGAs for Organic Computing |
| title_short | An Interface for a Decentralized 2D Reconfiguration on Xilinx Virtex-FPGAs for Organic Computing |
| title_sort | interface for a decentralized 2d reconfiguration on xilinx virtex fpgas for organic computing |
| url | http://dx.doi.org/10.1155/2009/273791 |
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