Analog Implementation of a Spiking System for Performing Arithmetic Logic Operations on Mixed‐Signal Neuromorphic Processors
In recent years, physical limitations in the integration of transistors in computers have forced the search for low‐computational‐power alternatives in hardware design. Although doubts may arise regarding the limit of the relationship between performance and power consumption in computers, these dis...
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| Format: | Article |
| Language: | English |
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Wiley
2025-04-01
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| Series: | Advanced Intelligent Systems |
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| Online Access: | https://doi.org/10.1002/aisy.202400524 |
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| author | Alvaro Ayuso‐Martinez Daniel Casanueva‐Morato Juan P. Dominguez‐Morales Giacomo Indiveri Angel Jimenez‐Fernandez Gabriel Jimenez‐Moreno |
| author_facet | Alvaro Ayuso‐Martinez Daniel Casanueva‐Morato Juan P. Dominguez‐Morales Giacomo Indiveri Angel Jimenez‐Fernandez Gabriel Jimenez‐Moreno |
| author_sort | Alvaro Ayuso‐Martinez |
| collection | DOAJ |
| description | In recent years, physical limitations in the integration of transistors in computers have forced the search for low‐computational‐power alternatives in hardware design. Although doubts may arise regarding the limit of the relationship between performance and power consumption in computers, these disappear when considering the brain, which is one of the most efficient computing systems. In this way, bioinspired applications try to benefit from the low‐power consumption present in the biological nervous system. Previous work has shown the feasibility of implementing spiking neural networks that operate in a Boolean manner on digital platforms, such as SpiNNaker, using basic logic gates and a spiking memory, which suggests the potential for constructing a low‐power consumption spiking computer. This work takes a first step in the implementation of a spiking central processing unit by developing an arithmetic logic unit, which is an essential block for instruction execution, demonstrating its correct operation on Dynap‐SE1. The results confirm the feasibility of using this Boolean approach on this platform, despite certain limitations in the number of inputs and operating frequencies of the blocks, and pave the way for the construction of a spiking computer. |
| format | Article |
| id | doaj-art-0622025089c54ba89fcf3f08f6abdee8 |
| institution | OA Journals |
| issn | 2640-4567 |
| language | English |
| publishDate | 2025-04-01 |
| publisher | Wiley |
| record_format | Article |
| series | Advanced Intelligent Systems |
| spelling | doaj-art-0622025089c54ba89fcf3f08f6abdee82025-08-20T02:11:37ZengWileyAdvanced Intelligent Systems2640-45672025-04-0174n/an/a10.1002/aisy.202400524Analog Implementation of a Spiking System for Performing Arithmetic Logic Operations on Mixed‐Signal Neuromorphic ProcessorsAlvaro Ayuso‐Martinez0Daniel Casanueva‐Morato1Juan P. Dominguez‐Morales2Giacomo Indiveri3Angel Jimenez‐Fernandez4Gabriel Jimenez‐Moreno5Robotics and Technology of Computers Lab Universidad de Sevilla Av. de la Reina Mercedes, s/n 41012 Sevilla SpainRobotics and Technology of Computers Lab Universidad de Sevilla Av. de la Reina Mercedes, s/n 41012 Sevilla SpainRobotics and Technology of Computers Lab Universidad de Sevilla Av. de la Reina Mercedes, s/n 41012 Sevilla SpainInstitute of Neuroinformatics University of Zurich and ETH Zurich Winterthurerstrasse 190 8057 Zurich SwitzerlandRobotics and Technology of Computers Lab Universidad de Sevilla Av. de la Reina Mercedes, s/n 41012 Sevilla SpainRobotics and Technology of Computers Lab Universidad de Sevilla Av. de la Reina Mercedes, s/n 41012 Sevilla SpainIn recent years, physical limitations in the integration of transistors in computers have forced the search for low‐computational‐power alternatives in hardware design. Although doubts may arise regarding the limit of the relationship between performance and power consumption in computers, these disappear when considering the brain, which is one of the most efficient computing systems. In this way, bioinspired applications try to benefit from the low‐power consumption present in the biological nervous system. Previous work has shown the feasibility of implementing spiking neural networks that operate in a Boolean manner on digital platforms, such as SpiNNaker, using basic logic gates and a spiking memory, which suggests the potential for constructing a low‐power consumption spiking computer. This work takes a first step in the implementation of a spiking central processing unit by developing an arithmetic logic unit, which is an essential block for instruction execution, demonstrating its correct operation on Dynap‐SE1. The results confirm the feasibility of using this Boolean approach on this platform, despite certain limitations in the number of inputs and operating frequencies of the blocks, and pave the way for the construction of a spiking computer.https://doi.org/10.1002/aisy.202400524arithmetic logic unitDynap‐SE1neuromorphic engineeringspiking building blockspiking computerspiking neural network |
| spellingShingle | Alvaro Ayuso‐Martinez Daniel Casanueva‐Morato Juan P. Dominguez‐Morales Giacomo Indiveri Angel Jimenez‐Fernandez Gabriel Jimenez‐Moreno Analog Implementation of a Spiking System for Performing Arithmetic Logic Operations on Mixed‐Signal Neuromorphic Processors Advanced Intelligent Systems arithmetic logic unit Dynap‐SE1 neuromorphic engineering spiking building block spiking computer spiking neural network |
| title | Analog Implementation of a Spiking System for Performing Arithmetic Logic Operations on Mixed‐Signal Neuromorphic Processors |
| title_full | Analog Implementation of a Spiking System for Performing Arithmetic Logic Operations on Mixed‐Signal Neuromorphic Processors |
| title_fullStr | Analog Implementation of a Spiking System for Performing Arithmetic Logic Operations on Mixed‐Signal Neuromorphic Processors |
| title_full_unstemmed | Analog Implementation of a Spiking System for Performing Arithmetic Logic Operations on Mixed‐Signal Neuromorphic Processors |
| title_short | Analog Implementation of a Spiking System for Performing Arithmetic Logic Operations on Mixed‐Signal Neuromorphic Processors |
| title_sort | analog implementation of a spiking system for performing arithmetic logic operations on mixed signal neuromorphic processors |
| topic | arithmetic logic unit Dynap‐SE1 neuromorphic engineering spiking building block spiking computer spiking neural network |
| url | https://doi.org/10.1002/aisy.202400524 |
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