Comparative analysis of adders hardware implementation on FPGA
In this work we considered two types of adders for addition of two binary numbers implementation: carry propagate adders and parallel-prefix adders. In this article simulation on FPGA for both architectures and their comparative analysis is made. Simulation results for 4, 8, 16 and 32-bits circuits...
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| Main Authors: | Nikolay Ivanovich Chervyakov, Pavel Alekseyevich Lyakhov, Maria Vasilevna Valueva, O. V. Krivolapova |
|---|---|
| Format: | Article |
| Language: | Russian |
| Published: |
North-Caucasus Federal University
2022-09-01
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| Series: | Наука. Инновации. Технологии |
| Subjects: | |
| Online Access: | https://scienceit.elpub.ru/jour/article/view/300 |
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