Simplified Carrier-Based SVDPWM Methods Using Reduced Common Mode Voltage Vector Redundancy for Improving Output Current Ripple in Four-Level NPC Inverter

In this article, new fast and Three-level reduced common-mode voltage (RCMV) space vector Discontinuous pulse width modulation (SVDPWM) strategies are proposed to achieve high performance in four-level neutral point clamped (4L-NPC) inverters. Redundant reduced common-mode voltage (RCMV) vectors in...

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Main Authors: Le Nam Pham, Quoc Dung Phan, Nho-van Nguyen
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Access
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Online Access:https://ieeexplore.ieee.org/document/11082150/
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author Le Nam Pham
Quoc Dung Phan
Nho-van Nguyen
author_facet Le Nam Pham
Quoc Dung Phan
Nho-van Nguyen
author_sort Le Nam Pham
collection DOAJ
description In this article, new fast and Three-level reduced common-mode voltage (RCMV) space vector Discontinuous pulse width modulation (SVDPWM) strategies are proposed to achieve high performance in four-level neutral point clamped (4L-NPC) inverters. Redundant reduced common-mode voltage (RCMV) vectors in the space vector diagram (SVD) of the Four-level inverter are utilized to design three discontinuous pulse width modulation (DPWM) control strategies with Three-level CMV (3L-CMV) characteristic, SVDPWM0, SVDPWM1 and HSVDPWM. The last and best one is deduced based on harmonic flux and harmonic distortion factor (HDF) analysis, to improve the output current ripple. For analysis and easy implementation, the SVPWM of the four-level inverter will be solved in the two-level SVD. A simple carrier-based PWM implementation of the RCMV SVDPWM methods will be developed to reduce the computational burden. The proposed 3L-CMV methods significantly reduce harmonic distortion compared to both Two-level CMV (2L-CMV) and Four-level CMV (4L-CMV) SVPWM methods. They exhibit a reduction in peak-to-peak CMV from approximately 40% to 60% and a lower CMV magnitude in the sampling frequency component compared to the 4L-CMV methods. As a result, the proposed system exhibits a considerable reduction in RMS leakage current. Additionally, they can achieve a reduction in switching loss up to 40% in specific conditions, offering improved efficiency compared to continuous PWM schemes.
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spelling doaj-art-02efbc0045044c7ca0ebc425f52cbc2f2025-08-20T03:31:46ZengIEEEIEEE Access2169-35362025-01-011312496212497810.1109/ACCESS.2025.358957211082150Simplified Carrier-Based SVDPWM Methods Using Reduced Common Mode Voltage Vector Redundancy for Improving Output Current Ripple in Four-Level NPC InverterLe Nam Pham0https://orcid.org/0000-0003-3271-1803Quoc Dung Phan1https://orcid.org/0000-0003-2289-5768Nho-van Nguyen2https://orcid.org/0000-0002-0181-5469Ho Chi Minh City University of Technology (HCMUT), Ho Chi Minh City, VietnamHo Chi Minh City University of Technology (HCMUT), Ho Chi Minh City, VietnamHo Chi Minh City University of Technology (HCMUT), Ho Chi Minh City, VietnamIn this article, new fast and Three-level reduced common-mode voltage (RCMV) space vector Discontinuous pulse width modulation (SVDPWM) strategies are proposed to achieve high performance in four-level neutral point clamped (4L-NPC) inverters. Redundant reduced common-mode voltage (RCMV) vectors in the space vector diagram (SVD) of the Four-level inverter are utilized to design three discontinuous pulse width modulation (DPWM) control strategies with Three-level CMV (3L-CMV) characteristic, SVDPWM0, SVDPWM1 and HSVDPWM. The last and best one is deduced based on harmonic flux and harmonic distortion factor (HDF) analysis, to improve the output current ripple. For analysis and easy implementation, the SVPWM of the four-level inverter will be solved in the two-level SVD. A simple carrier-based PWM implementation of the RCMV SVDPWM methods will be developed to reduce the computational burden. The proposed 3L-CMV methods significantly reduce harmonic distortion compared to both Two-level CMV (2L-CMV) and Four-level CMV (4L-CMV) SVPWM methods. They exhibit a reduction in peak-to-peak CMV from approximately 40% to 60% and a lower CMV magnitude in the sampling frequency component compared to the 4L-CMV methods. As a result, the proposed system exhibits a considerable reduction in RMS leakage current. Additionally, they can achieve a reduction in switching loss up to 40% in specific conditions, offering improved efficiency compared to continuous PWM schemes.https://ieeexplore.ieee.org/document/11082150/DPWMfour-level inverterneutral point clampedspace vector modulation
spellingShingle Le Nam Pham
Quoc Dung Phan
Nho-van Nguyen
Simplified Carrier-Based SVDPWM Methods Using Reduced Common Mode Voltage Vector Redundancy for Improving Output Current Ripple in Four-Level NPC Inverter
IEEE Access
DPWM
four-level inverter
neutral point clamped
space vector modulation
title Simplified Carrier-Based SVDPWM Methods Using Reduced Common Mode Voltage Vector Redundancy for Improving Output Current Ripple in Four-Level NPC Inverter
title_full Simplified Carrier-Based SVDPWM Methods Using Reduced Common Mode Voltage Vector Redundancy for Improving Output Current Ripple in Four-Level NPC Inverter
title_fullStr Simplified Carrier-Based SVDPWM Methods Using Reduced Common Mode Voltage Vector Redundancy for Improving Output Current Ripple in Four-Level NPC Inverter
title_full_unstemmed Simplified Carrier-Based SVDPWM Methods Using Reduced Common Mode Voltage Vector Redundancy for Improving Output Current Ripple in Four-Level NPC Inverter
title_short Simplified Carrier-Based SVDPWM Methods Using Reduced Common Mode Voltage Vector Redundancy for Improving Output Current Ripple in Four-Level NPC Inverter
title_sort simplified carrier based svdpwm methods using reduced common mode voltage vector redundancy for improving output current ripple in four level npc inverter
topic DPWM
four-level inverter
neutral point clamped
space vector modulation
url https://ieeexplore.ieee.org/document/11082150/
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AT nhovannguyen simplifiedcarrierbasedsvdpwmmethodsusingreducedcommonmodevoltagevectorredundancyforimprovingoutputcurrentrippleinfourlevelnpcinverter