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    A 16.8 fJ/c-s 8 b 500 MS/s Asynchronous Three-Comparator SAR ADC With Background Comparator-Swapping Offset Calibration in 28 nm CMOS LPP

    A 16.8 fJ/c-s 8 b 500 MS/s Asynchronous Three-Comparator SAR ADC With Background Comparator-Swapping Offset Calibration in 28 nm CMOS LPP by Seunghyun Kim, Yang Azevedo Tavares, Sewon Lee, Minjae Lee

    Published 2025-01-01
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