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Se Hwan Na
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Se Hwan Na
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Gate driver-in-panel circuit using low-temperature polycrystalline silicon and oxide TFTs with mitigated positive bias temperature stress
by
Se Hwan Na
,
Seok Gyu Hong
,
Yong Seon Hwang
,
Jung Chul Kim
,
Juhn Suk Yoo
,
Hyun Jae Kim
Published 2025-06-01
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