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  1. 1
    Energy- and Area-Efficient CMOS Neuron and Max Pooling Circuit for RRAM-Based CNN Accelerators

    Energy- and Area-Efficient CMOS Neuron and Max Pooling Circuit for RRAM-Based CNN Accelerators by Dowon Kim, Byung-Geun Lee

    Published 2025-01-01
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  2. 2
    Spiking Cooperative Network Implemented on FPGA for Real-Time Event-Based Stereo System

    Spiking Cooperative Network Implemented on FPGA for Real-Time Event-Based Stereo System by Jung-Gyun Kim, Donghwan Seo, Byung-Geun Lee

    Published 2022-01-01
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