Floating Point Multiple-Precision Fused Multiply Add Architecture for Deep Learning Computation on Artix 7 FPGA Board - VINOTHENI, M. S.; JAWAHAR SENTHIL KUMAR, V. (Advances in Electrical and Computer Engineering)
Deep learning (DL) has become a transformative force in today's world revolutionizing industries. However, its success relies on high-precision arithmetic units, leading to the requirement of powerful high precision arithmetic design. Hence, this research proposes the multiple precision fused multiply add (MPFMA) architecture for profound computing-based applications. The proposed MPFMA architecture is capable of performing momentous tasks in every single clock cycle such as eight consecutive numbers of half precision (HP) operations, four numbers of concurrent single precision (SP) operations, two simultaneous double precision (DP) operations and single quadruple precision (QP) operations. The propounded architecture is implemented using Xilinx Vivado 2022.2 on Artix-7 FPGA Basys 3 board that demonstrates the functionality and attainment. From the observed results, it is inferred that the proposed framework offers 50% area curtail with the conventional FMA architecture, while still meeting the precision requirements for deep learning tasks. With an astoundingly low error rate of 0.013 % and an amazing accuracy rate of 99.987 %, the MPFMA in deep learning hardware not only enhances model performance but also contributes to energy conservation, making DL systems more sustainable and promising for the future of smart intelligence applications.