Fundamentals of 1/f noise reduction technique based on complementary cascode switching applied to a 52 microwatts 5.2pJ/bit 100Kb/s 120 GHz receiver - Mihai Sanduleanu (Scientific Reports)
Abstract The proposed paper presents a 120 GHz receiver for Near-Field IoT sensors, without the conventional LNA and mixers building blocks. A new technique for the reduction of low-frequency 1/f noise is also presented. The technique is used to improve the sensitivity of the 120 GHz receiver with a data rate of 100 kb/s, by lowering the 1/f noise corner frequency. We are proposing a novel 1/f noise mitigation technique based on switched biasing. The technique involves the complementary switching of two MOSFET transistors to effectively act as a single MOSFET transistor. It also involves the isolation of the drain terminals of these identical MOSFET transistors to eliminate any electric field from the complementary transistors which may affect the de-trapping process. The complementary switching in the literature has only been applied to low-frequency circuits with the highest operating frequency being 120 kHz. The proposed technique leads to a 9 dB reduction in the drain current noise at frequencies up to 100 kHz. Realized in a 65 nm CMOS LPE technology from GlobalFoundries™, the receiver has a measured sensitive ty of -46 dBm, power consumption of 52 microwatts, and energy efficiency of 5.2 pJ/bit. The occupied on-chip area is 0.56 mm2.