A 5.5–7.5‐GHz band‐configurable wake‐up receiver fully integrated in 45‐nm RF‐SOI CMOS - Rui Ma; Florian Protze; Frank Ellinger (IET Circuits, Devices and Systems)
Abstract This work investigates a 5.5–7.5‐GHz band‐configurable duty‐cycled wake‐up receiver (WuRX) fully implemented in a 45‐nm radio‐frequency (RF) silicon‐on‐insulator (SOI) complementary‐metal‐oxide‐semiconductor (CMOS) technology. Based on an uncertain intermediate frequency (IF) super‐heterodyne receiver (RX) topology, the WuRX analogue front‐end (AFE) incorporates a 5.5–7.5‐GHz band‐tunable low‐power low‐noise amplifier, a low‐power Gilbert mixer, a digitally controlled oscillator (DCO), a 100‐MHz IF band‐pass filter (BPF), an envelope detector, a comparator, a pulse generator and a current reference. By application of duty cycling with a low duty cycle below 1%, the power consumption of the AFE was significantly reduced. In addition, the on‐chip digital bank‐end consists of a frequency divider, a phase corrector, a 31‐bit correlator and a serial peripheral interface. A proof‐of‐concept WuRX circuit occupying an area of 1200 μm by 900 μm has been fabricated in a GlobalFoundries 45‐nm RF‐SOI CMOS technology. Measurement results show that at a data rate of 64 bps, the entire WuRX consumes only 2.3 μW. Tested at 8 operation bands covering 5.5–7.7 GHz, the WuRX has a measured sensitivity between −67.5 dBm and −72.4 dBm at a wake‐up error rate of 10−3. With the sensitivity unchanged, the data rate of the WuRX can be scaled up to 8.2 kbps. To the authors' best knowledge, this work offers the largest RF bandwidth from 5.5 to 7.5 GHz, the most operation channels (≥8) and the fastest settling time (<115 ns) among the WuRXs reported to date.