SpaceCAM: A 16 nm FinFET Low-Power Soft-Error Tolerant TCAM Design for Space Communication Applications - Itay Merlin; Benjamin Zambrano; Marco Lanuzza; Alexander Fish; Avner Haran; Leonid Yavits (IEEE Access)
The Ternary Content Addressable Memory (TCAM) is a crucial component of satellite communication systems. Space-oriented TCAMs face unique challenges, as they must operate within a very limited energy budget and are susceptible to high Soft Error Rates (SER) due to ionizing particle radiation. The Dual Interlocked Storage Cell (DICE) based memory is capable of withstanding soft errors. However, its reliability diminishes in presence of multiple node upsets. Moreover, recent studies indicate that DICE resilience to even single-node upsets degrades in advanced technology nodes. This issue is further exacerbated by the scaling of the supply voltage to reduce power consumption. In this paper, we propose SpaceCAM, a DICE-based TCAM that overcomes the above limitations and enables aggressive voltage scaling while withstanding multiple node upsets in each memory row. SpaceCAM enables soft error tolerance by applying an approximate rather than an exact search. It tolerates up to 5 soft errors per 144-bit row, provided the minimum Hamming distance between stored data patterns (such as the Active Control List (ACL) rules) is 26. When designed using a 16nm FinFET commercial process, SpaceCAM $144× 512$ -bit memory core operates at a supply voltage of as low as 350mV, consuming 2mW while running at 500MHz.