Analysis of possibilities of FPGA-implementation for multiplication operations in the Galois field - E. V. Listopad (Doklady Belorusskogo gosudarstvennogo universiteta informatiki i radioèlektroniki)
The variants of hardware implementations of multiplication operations in the Galois field are considered for efficient solution of the tasks of constructing specialized processors based on FPGA, meeting strict requirements for speed and nominal value of the working clock frequency. Approaches to the hardware implementation of such operations demonstrating various qualitative indicators are proposed.